Process Technologies for Quarter-Micron Devices

摘要

This paper reports our development of LSI process technologies for 0.25μm devices. The goal of the development is to achieve low-power high-speed CMOS process for system LSIs having embedded DRAM and other function elements. New process technologies, such as KrF excimer laser lithography, high-density ion plasma etching, self-aligned siliside and low-x interlayer film, have been put into practical use. As a result, in CMOS logic process, the smallest-grade chip size, 100/100 higher operation speed and 50/100 lower power compared with 0.35μm process have been achieved. The paper describes topics on the newly developed process technologies in each element technology field, i.e., lithography, dry etching, transistor formation and interconnection.