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首页> 外文期刊>Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures >In-place fabrication of nanowire electrode arrays for vertical nanoelectronics on Si substrates
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In-place fabrication of nanowire electrode arrays for vertical nanoelectronics on Si substrates

机译:在硅衬底上就地制造用于垂直纳米电子学的纳米线电极阵列

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摘要

Vertical arrays of Pd nanowire electrodes with controllable and reproducible diameters and lengths are fabricated using a porous anodic alumina (PAA) template supported on a metallized Si substrate. The process described here employs a hydrogen plasma to penetrate the alumina pore barrier oxide prior to electrodeposition, enabling direct electrical contact with the back electrode metallization, thereby eliminating the need for electrochemical processing with high current or voltage pulsing that can lead to delamination or voiding. Electrical characteristics reveal Ohmic contact between the Pd nanowires and the underlying Ti conductive layer for samples with a range of pore diameters from 30 to 130 nm. This process enables both the fabrication of vertical nanowire arrays on prefunctionalized substrates, as well as the in situ fabrication of contacts to semiconductor nanodevices using a thin-film nanowire array. The hydrogen plasma step is particularly well suited to the fabrication of carbon nanotube arrays in PAA by plasma-enhanced chemical vapor deposition.
机译:使用支撑在金属化Si基板上的多孔阳极氧化铝(PAA)模板,可以制造出直径和长度可控制且可复制的Pd纳米线电极的垂直阵列。本文所述的工艺在电沉积之前使用氢等离子体穿透氧化铝孔隙阻挡层氧化物,从而实现与背面电极金属化的直接电接触,从而消除了对可能导致分层或空隙化的高电流或高电压脉冲进行电化学处理的需求。电气特性表明,对于孔径范围为30至130 nm的样品,Pd纳米线与下面的Ti导电层之间具有欧姆接触。该工艺既可以在预功能化的基板上制造垂直纳米线阵列,也可以使用薄膜纳米线阵列原位制造与半导体纳米器件的接触。氢等离子体步骤特别适合通过等离子体增强化学气相沉积法在PAA中制造碳纳米管阵列。

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