Energy-Constrained Multiplication of Non-square Matrices on FPGA-Based SIMD-MIMD Hybrid Multi-core Processors

摘要

Constant growing demands for embedded systems with better performance, lower cost, more flexibility, longer battery life, better user experience, and shorter time-to-market (TTM) call for more flexible and high-performance computing platforms. Although significant research results offer exciting benefits of state-of-the-art FPGAs, they have not yet been widely adopted by many system designers due to their hardware-oriented design methodology and low portability. We believe programmability supported by an established architecture is essential to close the gap. In this paper, we explore multiplication of non-square matrices by exploiting the benefits of both SIMD (single-instruction, multiple-data) and MIMD (multiple-instruction, multiple-data) simultaneously present in a reconfigurable and programmable multi-core processor. A novel memory design is proposed to facilitate data communication and overlap of computation and communication. With ever-increasing concerns for energy consumption, performance-energy trade-offs are often necessary, especially for embedded systems. Our performance-energy tradeoff techniques offer the user opportunities to meet performance-energy challenges of various scenarios. Comprehensive experimental results on the Xilinx ML605 FPGA board featuring a Virtex 6 device demonstrate the effectiveness of the proposed approach.