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A Dynamically Reconfigurable Dual-Waveform Baseband Modulator for Flexible Wireless Communications

机译:动态可重配置的双波形基带调制器,用于灵活的无线通信

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In future wireless communication systems, several radio access technologies will coexist and interwork to provide a great variety of services with different requirements. Thus, the design of flexible and reconfigurable hardware is a relevant topic in wireless communications. The combination of high performance, programmability and flexibility makes Field-programmable gate array a convenient platform to design such systems, especially for base stations. This paper describes a dynamically reconfigurable baseband modulator for Orthogonal Frequency Division Multiplexing and Filter-bank Multicarrier modulation waveforms implemented on a Virtex-7 board. The design features Dynamic Partial Reconfiguration (DPR) capabilities to adapt its mode of operation at run-time and is compared with a functionally equivalent static multi-mode design regarding processing throughput, resource utilization, functional density and power consumption. The DPR-based design implementation reserves about half the resources used by static multi-mode counterpart. Consequently, the baseband processing dynamic power consumption observed in the DPR-based design is between 26 mW to 90 mW lower than in the static multi-mode design, representing a dynamic power reduction between 13% to 52%. The worst-case DPR latency measured was 1.051 ms, while the DPR energy overhead is below 1.5 mJ. Considering latency requirements for modern wireless standards and power consumption constraints for commercial base stations, the DPR application is shown to be valuable in multi-standard and multi-mode systems, as well as in scenarios such as multiple-input and multiple-output or dynamic spectrum aggregation.
机译:在未来的无线通信系统中,多种无线电接入技术将共存并互通以提供具有不同要求的多种服务。因此,灵活和可重新配置的硬件设计是无线通信中的一个相关主题。高性能,可编程性和灵活性的结合使现场可编程门阵列成为设计此类系统(尤其是基站)的便捷平台。本文介绍了一种动态可重新配置的基带调制器,用于在Virtex-7板上实现的正交频分复用和滤波器组多载波调制波形。该设计具有动态部分重配置(DPR)功能,可在运行时适应其操作模式,并与功能等效的静态多模式设计进行了比较,该设计涉及处理吞吐量,资源利用率,功能密度和功耗。基于DPR的设计实现保留了静态多模式副本所使用资源的大约一半。因此,在基于DPR的设计中观察到的基带处理动态功耗要比静态多模设计低26 mW至90 mW,这表明动态功耗降低了13%至52%。测得的最坏情况DPR延迟为1.051 ms,而DPR能量开销低于1.5 mJ。考虑到现代无线标准的延迟要求和商业基站的功耗限制,DPR应用在多标准和多模式系统以及多输入多输出或动态场景中显示出了宝贵的价值。频谱聚合。

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