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The Implementation and Performance Study of Bit Synchronization Method in High Speed Digital Receiver

机译:高速数字接收机中比特同步方法的实现与性能研究

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摘要

Bit synchronization is one of the key technologies for the design and implementation of the high speed digital receiver, and is an important element to measure the reliability of its communication. The performance of synchronization will be influenced by many factors, among of which, symbol time delay and Gaussian white noise are the greatest. This paper systematically explains the realization principle of bit synchronization method based on interpolation. With the help of MATLAB tool, we have verified the feasibility of this method, obtained the impact of symbol delay and Gaussian white noise on the synchronization performance. In addition, we have gotten the stability results of the system in different SNR condition.
机译:比特同步是设计和实现高速数字接收机的关键技术之一,并且是衡量其通信可靠性的重要元素。同步的性能将受到许多因素的影响,其中,符号时间延迟和高斯白噪声最大。本文系统地阐述了基于插值的比特同步方法的实现原理。借助MATLAB工具,我们验证了该方法的可行性,获得了符号延迟和高斯白噪声对同步性能的影响。此外,我们还获得了在不同SNR条件下系统的稳定性结果。

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