Low thermal budget selective epitaxial growth for formation of elevated source/drain MOS transistors

摘要

We studied the dependence of selective epitaxially grown silicon (SEG-Si) morphology under ultrahigh vacuum chemical vapor deposition (UHV-CVD) conditions by using a mixture of disilane (Si_2H_6) and chlorine (Cl_2) gases on Si(100) substrates patterned a metal oxide semiconductor transistor with Si_3N_4 sidewalls. We confirmed that the morphology of the SEG-Si is strongly dependent on the dry etching conditions used for formation of the sidewall structures and that the Cl_2 plasma etching process results in lower damage to the substrate surface than CHF_3/Ar plasma etching. It was demonstrated that by combining low-damage sidewall etching with Cl_2 plasma and the UHV-CVD process with deoxidation effects it was possible to flatten the SEG-Si surface at temperatures below 700℃ without the need for preheating at a higher temperature.