机译:用于改善短沟道性能的纳米级线性梯度二元金属合金栅极圆柱形无结MOSFET的全面二维分析研究
Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata 700 032, India;
Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata 700 032, India;
Junctionless cylindrical gate; Work function engineering; Binary metal alloy gate; Short channel effect(SCE); Threshold voltage roll-off (TVRO); Drain induced barrier lowering (DIBL);
机译:线性渐变二元金属合金栅极纳米级圆柱MOSFET的分析建模和仿真,以减少短沟道效应
机译:新型线性渐变二元金属合金四栅极MOSFET的紧凑准3D门限电压建模和性能分析
机译:二维(2D)分析建模和改进的分级通道栅极堆叠(GCGS)双材料双栅极(DMDG)MOSFET的简短信道性能
机译:基于Si和III-V的短通道无结圆柱形环绕栅MOSFET的性能:比较研究
机译:双栅极MOSFET中短沟道效应的分析模型。
机译:短沟道无结双栅mOsFET的二维分析模型