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Analysis and Design of High Gain-Bandwidth CMOS Distributed Amplifier Utilizing a Cascaded Pseudo Differential Distributed Amplifier

机译:利用级联伪差分分布式放大器的高增益带宽CMOS分布式放大器的分析与设计

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Distributed amplioverlineers (DAs) are one of the most important and common wideband amplioverlineers that can use various arrangements in their gain cell structure. One of the gain cells that can be e (R) ective in increasing the bandwidth of a distributed amplioverlineer is the pseudo-di (R) erential amplioverlineer (PDA). Although pseudo-di (R) erential distributed amplioverlineers (PDDAs) have a wide bandwidth and amplify DC, they have a small voltage gain. In this paper, various circuits with the same power and chip area are proposed to improve the performance of PDDAs. For evaluating and comparing the performance of the proposed circuits, they are implemented in 0.18 mu m RF-CMOS technology. The simulation results reveal that two cascaded PDDAs with three stages have a better performance than three cascaded PDDAs with two stages; in two cascaded PDDAs with three stages, a gain of 9 dB can be achieved for a bandwidth of 50 GHz in 0.18 mu m RF-CMOS technology. In this amplioverlineer, parameters S11, S22 and S12 are - 12, -10 and - 18 dB, respectively; noise overlinegure is 4.3-5.8 dB, and P1dB is +4 dBm. This amplioverlineer consumes 220mW power and has a chip area of 0.58mm2.
机译:分布式放大器 ers(DAS)是最重要的宽带宽带放大器之一,可以在增益单元结构中使用各种布置的宽带宽度。可以是e(r)在增加分布式放大器 er的带宽时可以是e(r)的增益单元是伪di(r)界漏overline> er(PDA)。虽然伪DI(R)界面分布式AMPLI ERS(PDDA)具有宽带宽和放大DC,但它们具有小的电压增益。在本文中,提出了具有相同功率和芯片区域的各种电路来提高PDDA的性能。为了评估和比较所提出的电路的性能,它们以0.18 mu m rf-cmos技术实施。仿真结果表明,两个具有三个阶段的级联PDDA具有比具有两个阶段的三个级联PDDA更好的性能;在具有三个阶段的两个级联PDDA中,在0.18 mu M rf-CMOS技术中的50 GHz带宽可以实现9 dB的增益。在该AmpliN ER中,参数S11,S22和S12分别为-12,-10和-18dB;噪声 Gure是4.3-5.8 dB,P1DB为+4 dBm。该AMPLIN ER消耗220mW功率,并且具有0.58mm2的芯片面积。

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