A 20-MHz BW MASH Sigma-Delta Modulator with Mismatch Noise Randomization for Multi-Bit DACs

摘要

A high-linearity Multi-stAge noise SHaping (MASH) 2-2-2 sigma-delta modulator (SDM) for 20-MHz signal bandwidth (BW) was presented. Multi-bit quantizers were employed in each stage to provide a sufficiently low quantization noise level and thus improve the signal-to-noise ratio (SNR) performance of the modulator. Mismatch noise in the internal multi-bit digital-to-analog converters (DACs) was analyzed in detail, and an alternative randomization scheme based on multi-layer butterfly-type network was proposed to suppress spurious tones in the output spectrum. Fabricated in a 0.18-mu m single-poly 4-metal Complementary Metal Oxide Semiconductor (CMOS) process, the modulator occupied a chip area of 0.45 mm(2), and dissipated a power of 28.8 mW from a 1.8-V power supply at a sampling rate of 320 MHz. The measured spurious-free dynamic range (SFDR) was 94 dB where 17-dB improvement was achieved by applying the randomizers for multi-bit DACs in the first two stages. The peak signal-to-noise and distortion ratio (SNDR) was 76.9 dB at -1 dBFS @ 2.5-MHz input, and the figure-of-merit (FOM) was 126 pJ/conv.