A Low-Power, Sub-1-V All-MOSFET Subthreshold Voltage Reference Using Body Biasing

摘要

A low-voltage and low-power all-MOSFET voltage reference is presented having most of the transistors working in subthreshold region. The basic beta-multiplier with cascode transistor provides a supply-independent current utilized by the active load circuit to generate an output reference voltage using body biasing. The proposed circuit is simulated using standard SCL 180-nm CMOS technology for the supply voltage ranging from 0.75 V to 1.8 V. The simulation obtains an average output voltage reference of 450.4 mV for the given supply range at room temperature. The minimum power dissipation at room temperature is 54.37 nW. The temperature coefficient (TC) of 28.13 ppm/degrees C is achieved having the temperature range of -10-87 degrees C for the minimum operating supply voltage. It has the PSRR values of -39.4 dB at 100 Hz and -12 dB at 1 MHz. Also, the active area of the proposed circuit is 0.014 mm(2).