首页> 外文期刊>Journal of Circuits, Systems, and Computers >DESIGN OF VARIABLE FRACTIONAL DELAY FIR FILTERS WITH CSD COEFFICIENTS USING GENETIC ALGORITHM
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DESIGN OF VARIABLE FRACTIONAL DELAY FIR FILTERS WITH CSD COEFFICIENTS USING GENETIC ALGORITHM

机译:基于遗传算法的CSD系数可变分数阶FIR滤波器设计

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This paper presents a new method for the design of variable fractional delay (VFD) FIR digital filters using Genetic Algorithm (GA). Each sub-filter of Farrow structure is designed individually with defined accuracy and bandwidth. A variable mutation probability is also employed, which improves the accuracy of the solution. Compared with existing methods, it reduces the computational complexity and enhances the design flexibility. Furthermore, a simple GA is used to compute the filter coefficients in canonic singed digit (CSD) representations. Since this algorithm selects the initial population in CSD representation and searches for the digits between [—1 1], most of the digits become zero. The filter multipliers can be built with simple shift registers and adders, resulting in a high-speed and low-power filter implementation. Multiplier-free structure typically shows 11.4% saving in power and 17.2% reduction in area consumption.
机译:本文提出了一种使用遗传算法(GA)设计可变分数延迟(VFD)FIR数字滤波器的新方法。 Farrow结构的每个子滤波器均按定义的精度和带宽进行单独设计。还采用了可变的突变概率,这提高了求解的准确性。与现有方法相比,它降低了计算复杂度并增强了设计灵活性。此外,简单的GA用于计算经典单数(CSD)表示形式的滤波器系数。由于此算法选择CSD表示形式中的初始填充并搜索[-1-1]之间的数字,因此大多数数字变为零。可以使用简单的移位寄存器和加法器构建滤波器乘法器,从而实现了高速,低功耗的滤波器实现。无倍增器结构通常显示出11.4%的功耗节省和17.2%的面积消耗减少。

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