Reconfigurable FPGA/GPU-Based Architecture of Block Compressive Sampling Matching Pursuit Algorithm

摘要

The signals in reality are sparse signal where a few numbers of samples are non-zero. So, a compression technique must be applied to reduce the overhead of processing, storing, and transmission. Blocking compressive sampling matching pursuit (BCoSaMP) algorithm is a recursive algorithm which provides an accurate reconstruction of sparse signal from a small number of noisy samples. It doesn't assume that the noise is Gaussian or bounded but it uses information about the noise magnitude for stopping criterion. However, BCoSaMP is a computationally intensive algorithm. So, BCoSaMP algorithm has been implemented on both field-programmable gate array (FPGA) and graphic processing units (GPU) by exploiting parallel and pipelining approaches. A new software tool called radar signal processing tool (RSPT) is also presented. It allows the designer to auto-generate fully optimized VHDL representation of BCoSaMP by specifying many user input parameters through graphical user interface (GUI). Moreover, it provides the designer a feedback on various performance parameters. This offer the designer the ability to make any adjustments to the BCoSaMP component until gets the desired performance of the overall system-on-chip (SoC). Our simulation results indicate that the achieved speed-up of FPGA and GPU over the sequential one is improved by up to 14 and 10.7, respectively.