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首页> 外文期刊>Journal of circuits, systems and computers >Double Stairs: A Fault-Tolerant Routing Algorithm for Networks-on-Chip
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Double Stairs: A Fault-Tolerant Routing Algorithm for Networks-on-Chip

机译:双层楼梯:片上网络的容错路由算法

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摘要

Reliability is one of the main concerns in the design of networks-on-chip (NoCs) due to the use of deep submicron technologies in fabrication of such products. This paper presents a new fault-tolerant routing algorithm called double stairs for NoCs. Double stairs routing algorithm is a low overhead routing that has the ability to deal with fault. The proposed routing algorithm makes a redundant copy of each packet at the source node and routes the original and redundant packets in a new partially adaptive routing algorithm. The method is evaluated for various packet injection rates and fault rates. Experimental results show that the proposed routing algorithm offers the best trade-off between performance and fault tolerance compared to other routing algorithms, namely flooding, XYX and probabilistic flooding.
机译:由于在此类产品的制造中使用了深亚微米技术,因此可靠性是片上网络(NoC)设计中的主要问题之一。本文提出了一种新的容错路由算法,称为NoC的双阶梯。双阶梯路由算法是一种低开销的路由,具有处理故障的能力。所提出的路由算法在源节点上对每个数据包进行冗余复制,并在新的部分自适应路由算法中路由原始数据包和冗余数据包。针对各种分组注入率和故障率评估该方法。实验结果表明,与泛洪,XYX和概率泛洪等其他路由算法相比,所提出的路由算法在性能和容错能力之间提供了最佳的权衡。

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