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Full-Wave Bridge Rectifier with CMOS Pass Transistors Configuration

机译:具有CMOS Pass晶体管配置的全波桥式整流器

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An effortless, more efficient full-wave bridge rectifier is introduced with minimum distortion. Efficient and exploratory combinations of CMOS logic are not only utilized to design full-wave bridge rectifier, but also as pass transistors configurations at the input. The particular CMOS logic (used to design core rectifier circuit) is a collective form of SDG-NMOS and SGS-PMOS. SDG-NMOS refers to a shorted drain gate n-channel metal oxide semiconductor. SGS-PMOS refers to shorted gate to source p-channel metal oxide semiconductor. Due to the utilization of renovated MOS configuration after the replacement of the diode, the efficiency of the full-wave bridge rectifier is increased up to 11% compared to p-n junction diode based full wave bridge rectifier. The proposed full wave bridge rectifier is a comparably low power circuit. The proposed CMOS based full-wave bridge rectifier is optimized at 45-nm CMOS technology. Cadence experimental simulation and implementations of the leakage power and efficiency demonstrate better consistency through the proposed circuit.
机译:推出了一种毫不费力,效率更高的全波桥式整流器,失真最小。 CMOS逻辑的有效和探索性组合不仅用于设计全波桥式整流器,而且还用作输入处的传输晶体管配置。特定的CMOS逻辑(用于设计核心整流器电路)是SDG-NMOS和SGS-PMOS的集合形式。 SDG-NMOS是指短路的漏极栅n沟道金属氧化物半导体。 SGS-PMOS是指栅极到源极的p沟道金属氧化物半导体的短路。由于在更换二极管后使用了经过革新的MOS配置,与基于p-n结二极管的全波桥整流器相比,全波桥式整流器的效率提高了11%。所提出的全波桥式整流器是一个相对低功率的电路。拟议的基于CMOS的全波桥式整流器在45 nm CMOS技术上进行了优化。 Cadence的实验仿真以及泄漏功率和效率的实现通过所提出的电路表现出更好的一致性。

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