InP/SiO2 MIS structure

摘要

Metal‐insulator‐semiconductor (MIS) structures were produced by the pyrolitic deposition of SiO2 on InP. The insulating layers were hard and glasslike with a room‐temperature resistivity ≳1015 Ω cm at a field of 106 V/cm. Breakdown field strengths are typically between 5×106 and 107 V/cm. The electrical properties of the InP‐SiO2 interface were found to exhibit a strong dependence on the SiO2 deposition process parameters. For optimum conditions capacitance/voltage (C/V) measurements suggest that the average interface state density is ∼2×1011 cm-2 eV-1 with flat band occurring at a gate voltage of approximately -0.1 V. Triangular waveform bias sweep frequencies of ≲10-3 Hz are required to attain equilibrium C/V conditions.