Metal-oxide-semiconductor interface properties of TiN/Y_2O_3/Si_(0.62)Ge_(0.38) gate stacks with high temperature post-metallization annealing

摘要

We investigate the influence of an interfacial layer (IL) formed by plasma pre-oxidation on atomic layer deposition TiN/Y_2O_3/Si_(0.62)Ge_(0.38) metal-oxide-semiconductor (MOS) gate stacks on the electrical characteristics of the MOS interfaces in order to examine the physical mechanism of the interface trap density (D_(it)) of SiGe MOS interfaces. The post-metallization annealing (PMA) temperature significantly decreases D_(it). It is found that, at any PMA temperature, D_(it) at the MOS interfaces without pre-oxidation is lower than that with pre-oxidation. The low D_(it) value of 7 × 10~(11) eV~(-1) cm~(-2) is obtained for TiN/Y_2O_3/SiGe without pre-oxidation after PMA at 450 °C. It is revealed that the ILs of TiN/Y_2O_3 stacks with and without pre-oxidation after PMA consist mainly of YSiO_x/SiGeO_x and YSiO_x, respectively. The physical origins of reduction in D_(it) without pre-oxidation and after PMA are attributable to the reduction in the amount of Ge-O bonds at the interface and an annealing effect of distorted Ge-O bonds, respectively.