首页> 外文期刊>Japanese Journal of Applied Physics. Part 1, Regular Papers, Brief Communications & Review Papers >Impact of Tunnel Etching Process on Electrical Performances of SON Devices
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Impact of Tunnel Etching Process on Electrical Performances of SON Devices

机译:隧道刻蚀工艺对SON器件电性能的影响

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摘要

The removal of a sacrificial SiGe layer by isotropic etching has been newly improved for silicon-on-nothing (SON) technology by increasing etching selectivity to the Si conduction channel. Still based on CF_4 plasma chemistry, power and pressure are adapted in order to decrease etch rate and improve SiGe:Si selectivity. Both electrical characteristics and morphological observations are used to evaluate the characteristics of this technological step in terms of selectivity and uniformity. An original nonvolatile memory (NVM) concept based on this process will illustrate the interest in such etching development.
机译:对于无硅技术(SON),通过各向同性刻蚀去除牺牲SiGe层,通过增加对Si导电通道的刻蚀选择性,已进行了新的改进。仍基于CF_4等离子体化学性质,功率和压力经过调整,以降低蚀刻速率并提高SiGe:Si的选择性。电气特性和形态学观察均用于评估该工艺步骤在选择性和均匀性方面的特性。基于此过程的原始非易失性存储器(NVM)概念将说明这种蚀刻开发的兴趣。

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