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首页> 外文期刊>Japanese journal of applied physics >A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown Voltage
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A Novel Cost Effective Double Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor Design for Improving Off-State Breakdown Voltage

机译:一种新颖的具有成本效益的双减小表面场横向扩散金属氧化物半导体设计,用于改善关态击穿电压

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摘要

In this work, double reduced surface field (RESURF) laterally diffused metal oxide semiconductor (LDMOS) device combines a new implant technology without using additional mask in standard 0.18 μm technology has been proposed and successfully fabricated. The breakdown voltage (BV) can be improved significantly with simply changing the implanted region length in this implant technology. Firstly, hydrodynamic transport simulations which analyze the high bias condition electric field distributions are examined to predict and explain the increase of breakdown voltage. Then the fabricated devices process flow is demonstrated, the structures are performed, and the breakdown voltages increase with different n-type double diffusion (NDD) photoresistor (PR) size using the change of PR exposure dose are investigated. The measurement results show that maximum NDD PR size achieves BV improvement of 6.3%, and 5% increase of figure of merit (FOM) evaluation. Throughout the whole fabrication process, no additional mask and device area show the potential of cost effective with the proposed technique. Such devices with good off-state breakdown voltage and specific on-resistance are very competitive with similar technologies and show good promising in system on chip (SOC) applications.
机译:在这项工作中,已经提出并成功制造了双重缩小表面场(RESURF)横向扩散金属氧化物半导体(LDMOS)器件,该器件结合了一种新的注入技术,而无需在标准0.18μm技术中使用额外的掩模。只需更改此注入技术中的注入区域长度,即可大幅提高击穿电压(BV)。首先,研究了分析高偏置条件电场分布的流体动力传输模拟,以预测和解释击穿电压的增加。然后说明了所制造器件的工艺流程,进行了结构设计,并研究了随着PR曝光剂量的变化,击穿电压随着n型双扩散(NDD)光敏电阻(PR)尺寸的增加而增加的情况。测量结果表明,最大NDD PR大小可实现6.3%的BV改善,以及品质因数(FOM)评估增加5%。在整个制造过程中,没有额外的掩模和器件面积显示出所提出技术具有成本效益的潜力。此类器件具有良好的断态击穿电压和特定的导通电阻,与同类技术极具竞争力,并且在片上系统(SOC)应用中显示出良好的前景。

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  • 来源
    《Japanese journal of applied physics》 |2012年第4issue2期|p.04DP04.1-04DP04.4|共4页
  • 作者单位

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

    Himax Technologies, Hsinchu 300, Taiwan;

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

    Vanguard International Semiconductor Corporation, Hsinchu 300, Taiwan;

    Himax Technologies, Hsinchu 300, Taiwan;

    Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan;

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