机译:漏极诱导的肖特基势垒源侧热载流子及其在纳米线电荷陷阱存储器局部位编程中的应用
Institute of Electronics Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan;
Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan;
Institute of Electronics Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan, Department of Electrical Engineering, National Chi Nan University, Nantou 54561, Taiwan;
National Nano Device Laboratories, Hsinchu 30078, Taiwan;
Institute of Electronics Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan;
机译:肖特基势垒电荷陷阱存储器中载流子注入和电荷分布的耦合,采用源侧电子编程
机译:使用肖特基势垒源端注入编程的本地化两位/单元纳米线SONOS存储器
机译:栅极到源极/漏极失准对源侧注入肖特基势垒电荷陷阱存储单元的影响,使用数值编程陷阱迭代来评估
机译:掺杂物隔离的多位/单元肖特基势垒电荷陷阱存储器的迭代编程分析
机译:肖特基势垒二极管及其作为肖特基势垒电阻的应用
机译:用于高速开关应用的三层石墨烯纳米带肖特基势垒FET的分析模型
机译:肖特基屏障电荷捕获电池的横向缩放,用于节能应用