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首页> 外文期刊>Japanese journal of applied physics >Design, experimental verification, and analysis of a 1.8-V-input-range voltage-to-current converter using source degeneration for low-noise multimodal CMOS biosensor array
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Design, experimental verification, and analysis of a 1.8-V-input-range voltage-to-current converter using source degeneration for low-noise multimodal CMOS biosensor array

机译:低噪声多峰CMOS生物传感器阵列使用源极退化的1.8V输入范围电压至电流转换器的设计,实验验证和分析

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摘要

A multimodal complementary metal-oxide semiconductor (CMOS) biosensor array manufactured using measurement methods such as potentiometry, amperometry, and impedimetry improves its cost competitiveness and measurement accuracy. In addition, it provides a wider range of application because it can obtain signals from multiple aspects. To develop high-signal-to-noise ratio (SNR) multimodal biosensor arrays, time-domain current integration was proposed in the literature and found to be effective. In addition to amperometry and impedimetry, it is possible to perform current integration using the potentiometry output by employing a voltage-to-current converter (VCC). However, a conventional VCC with a fixed transconductance mode does not provide a sufficient input range (<0.6 V) and its noise property has not been investigated. In this work, we investigate the design and noise property of a newly proposed VCC with source degeneration that enhances the input range. For evaluating the proposed method, a test chip was fabricated in a 0.6 mu m CMOS. The measured results successfully demonstrate that the input range was enhanced from 0.6 to 1.8V. Autonomous current limitation was also confirmed. The measured total input-referred noise was 0.445mV (from 10 Hz to 10 kHz, assuming current integration at every 1 ms). (C) 2017 The Japan Society of Applied Physics
机译:使用诸如电位计,安培计和阻抗计的测量方法制造的多峰互补金属氧化物半导体(CMOS)生物传感器阵列提高了其成本竞争力和测量精度。另外,由于它可以从多个方面获得信号,因此它提供了更广泛的应用范围。为了开发高信噪比(SNR)的多峰生物传感器阵列,在文献中提出了时域电流积分方法,并发现是有效的。除了电流分析法和阻抗分析法外,还可以通过采用电压-电流转换器(VCC)使用电位计输出来执行电流积分。但是,具有固定跨导模式的常规VCC无法提供足够的输入范围(<0.6 V),并且尚未研究其噪声特性。在这项工作中,我们研究了一种新提出的VCC的设计和噪声特性,该VCC具有源变性,可增强输入范围。为了评估提出的方法,在0.6微米CMOS中制造了测试芯片。测量结果成功证明输入范围从0.6V增加到1.8V。还确定了自主电流限制。测得的总输入噪声为0.445mV(假设每1 ms进行电流积分,则从10 Hz至10 kHz)。 (C)2017日本应用物理学会

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  • 来源
    《Japanese journal of applied physics》 |2017年第1s期|01AH06.1-01AH06.4|共4页
  • 作者单位

    Nagoya Univ, Dept Elect Engn & Comp Sci, Nagoya, Aichi 4648603, Japan|JST PRESTO, Kawaguchi, Saitama 3320012, Japan;

    Nagoya Univ, Dept Elect Engn & Comp Sci, Nagoya, Aichi 4648603, Japan;

    Nagoya Univ, Dept Elect Engn & Comp Sci, Nagoya, Aichi 4648603, Japan;

    Nagoya Univ, Dept Elect Engn & Comp Sci, Nagoya, Aichi 4648603, Japan;

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