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High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP

机译:高性能生物成对序列比对:FPGA,GPU,Cell BE,GPP

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This paper explores the pros and cons of reconfigurable computing in the form of FPGAs for high performance efficient computing. In particular, the paper presents the results of a comparative study between three different acceleration technologies, namely, Field Programmable Gate Arrays (FPGAs), Graphics Processor Units (GPUs), and IBM's Cell Broadband Engine (Cell BE), in the design and implementation of the widely-used Smith-Waterman pairwise sequence alignment algorithm, with general purpose processors as a base reference implementation. Comparison criteria include speed, energy consumption, and purchase and development costs. The study shows that FPGAs largely outperform all other implementation platforms on performance per watt criterion and perform better than all other platforms on performance per dollar criterion, although by a much smaller margin. Cell BE and GPU come second and third, respectively, on both performance per watt and performance per dollar criteria. In general, in order to outperform other technologies on performance per dollar criterion (using currently available hardware and development tools), FPGAs need to achieve at least two orders of magnitude speed-up compared to general-purpose processors and one order of magnitude speed-up compared to domain-specific technologies such as GPUs.
机译:本文探讨了FPGA形式的可重构计算的优缺点,以实现高性能高效计算。特别是,本文介绍了在设计和实现中三种不同加速技术之间的比较研究结果,这三种加速技术分别是现场可编程门阵列(FPGA),图形处理器单元(GPU)和IBM的Cell Broadband Engine(Cell BE)。 Smith-Waterman成对序列比对算法的基本原理,以通用处理器为基础。比较标准包括速度,能耗以及购买和开发成本。研究表明,FPGA的每瓦性能标准在很大程度上优于所有其他实现平台,并且在每美元性能标准方面的性能优于所有其他平台,尽管幅度要小得多。在每瓦性能和每美元性能方面,Cell BE和GPU分别排名第二和第三。一般而言,为了在按美元计算的性能标准上优于其他技术(使用当前可用的硬件和开发工具),与通用处理器相比,FPGA需要至少实现两个数量级的提速,而对于通用处理器而言,FPGA需要实现一个数量级的提速。与特定领域的技术(例如GPU)相比

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  • 来源
    《International journal of reconfigurable computing》 |2012年第2012期|752910.1-752910.15|共15页
  • 作者单位

    Institute of Integrated Systems, School of Engineering, The University of Edinburgh, Kings Buildings, Mayfield Road, Edinburgh EH9 3JL, UK;

    Electrical and Computer Engineering Department, The University of Arizona, Tucson, AZ 85721-0104, USA;

    Institute of Integrated Systems, School of Engineering, The University of Edinburgh, Kings Buildings, Mayfield Road, Edinburgh EH9 3JL, UK;

    Electrical and Computer Engineering Department, The University of Arizona, Tucson, AZ 85721-0104, USA;

    Institute of Integrated Systems, School of Engineering, The University of Edinburgh, Kings Buildings, Mayfield Road, Edinburgh EH9 3JL, UK;

    Institute of Integrated Systems, School of Engineering, The University of Edinburgh, Kings Buildings, Mayfield Road, Edinburgh EH9 3JL, UK;

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