PERFORMANCE ENHANCEMENT ON MICROPROCESSORS WITH HIERARCHICAL MEMORY SYSTEMS FOR SOLVING LARGE SPARSE LINEAR SYSTEMS

摘要

In recent years, scientific computing is being driven by microprocessor-based architectures. Most architectural designs are characterized by fast processors, fast but small caches, and large but slow memories. As a result, problems of small sizes that fit in cache perform exceed- ingly well, whereas the performance of larger problems is limited by the speed of memory. In this paper, the authors study the performance characteristics of several iterative kernels for solving sparse linear systems on several popu- lar microprocessors. Given the performance limitations posed by slow memory on large problem sizes, the authors show the effectiveness of using domain decom- position methods of the additive Schwarz type to enhance performance on single microprocessors.