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A low-power and low-complexity continuous-time Gm-C based Delta-Sigma modulator for WCDMA/UMTS

机译:用于WCDMA / UMTS的低功耗,低复杂度,连续时间基于Gm-C的Delta-Sigma调制器

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This article describes the implementation of a continuous-time Delta-Sigma modulator for WCDMA/UMTS in wireless communication. The Delta-Sigma modulator employs a Gm-C based integrator to form a fourth-order noise-shaping loop. The modulator samples at 160 MHz and has an over-sampling ratio of 40 in 2 MHz bandwidth. To reduce power consumption and design complexity, single-bit quantisation is employed. The modulator is implemented in 0.25 μm 1-ploy 5-metal CMOS technology and has an area of 0.13 mm~2. The modulator can achieve 70.7 dB of signal-to-noise-plus-distortion-ratio and 74 dB of dynamic range. Finally, the modulator consumes 3.5 mW of power with a reduced power supply of 1.8 V.
机译:本文介绍了无线通信中WCDMA / UMTS的连续时间Delta-Sigma调制器的实现。 Delta-Sigma调制器采用基于Gm-C的积分器来形成四阶噪声整形环路。调制器以160 MHz采样,并在2 MHz带宽中具有40的过采样率。为了降低功耗和设计复杂性,采用了单位量化。该调制器采用0.25μm1层5金属CMOS技术实现,面积为0.13 mm〜2。该调制器可实现70.7 dB的信噪比和失真比以及74 dB的动态范围。最后,调制器消耗3.5 mW的功率,而降低的电源电压为1.8V。

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