A Purely Mux Based High Speed Barrel Shifter Design

摘要

Barrel shifters are often used in many key computer operations from address decoding to computer arithmetic. Barrel shifters are primarily used for performing data shifting and rotation operations. Different barrel shifter architectures show trade offs in terms of area power and delay. In this paper we present the design and the VLSI implementation of a novel 'purely MUX based 'barrel shifter architecture in 0 6mm, N-well CMOS process using a optimized static CMOS logic design style. The proposed barrel shifter implementation shows almost 50% reduction in the propagation delay, while keeping the almost similar average power consumption (at 10MHz) as compared to the implementation by Ramin Rafati [9]. The total transistor count, maximum instantaneous power, leakage power, core area, total routing length and number of vias highlights the VLSI implementation characteristics.