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A picopower temperature-compensated, subthreshold CMOS voltage reference

机译:皮微功耗温度补偿的亚阈值CMOS电压基准

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摘要

A voltage reference consisting of only two nMOS transistors with different threshold voltages is presented. Measurements performed on 23 samples from a single batch show a mean reference voltage of 275.4 mV. The subthreshold conduction and the low number of transistors enable to achieve a mean power consumption of only 40 pW. The minimum supply voltage is 0.45 V, which coincides with the lowest value reported so far. The mean TC in the temperature range from 0 to 120 ℃ is 105.4 ppm/℃, while the mean line sensitivity is 0.46%/V in the supply voltage range 0.45-1.8 V. The occupied area is 0.018 mm~2. The power supply rejection rate without any filtering capacitor is - 48 dB at 20 Hz and -29.2 dB at 10 kHz. Thanks to large area transistors and to a careful layout, the coefficient of variation of the reference voltage is only 0.62%. We introduce as a new figure of merit, the voltage temperature parameter (VTP), which gives a direct measure of the overall percentage variation of the reference voltage on the typical 2D domain of supply voltage and temperature. For the proposed circuit, the average VTP is 1.70% with a standard deviation of 0.21 %. In order to investigate the effect of transistor area on process variability, a 4X replica of the proposed configuration has been fabricated and tested as well. Except for LS, the 4X replica doesn't exhibit any appreciable improvement with respect to the basic voltage reference.
机译:提出了仅由两个具有不同阈值电压的nMOS晶体管组成的参考电压。对单个批次的23个样品进行的测量显示平均参考电压为275.4 mV。亚阈值导通和晶体管数量少使得平均功耗仅为40 pW。最小电源电压为0.45 V,与迄今为止报告的最低值一致。在0至120℃的温度范围内,平均TC为105.4 ppm /℃,而在电源电压为0.45-1.8 V的范围内,平均线路灵敏度为0.46%/ V。占用面积为0.018 mm〜2。没有任何滤波电容器的电源抑制率在20 Hz时为-48 dB,在10 kHz时为-29.2 dB。由于采用了大面积的晶体管和精心的布局,参考电压的变化系数仅为0.62%。我们引入了电压温度参数(VTP)作为新的品质因数,它可以直接测量参考电压在电源电压和温度的典型2D域上的总体百分比变化。对于建议的电路,平均VTP为1.70%,标准偏差为0.21%。为了研究晶体管面积对工艺可变性的影响,还制造并测试了所提出配置的4X复制品。除LS外,相对于基本电压基准,4X复制品未显示任何明显的改进。

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  • 作者单位

    Dipartimento di Elettronica, Informatica e Sistemistica, Universita della Calabria, via P. Bucci 42C, I-87036, Arcavacata di Rende (CS), Italy;

    Dipartimento di Elettronica, Informatica e Sistemistica, Universita della Calabria, via P. Bucci 42C, I-87036, Arcavacata di Rende (CS), Italy;

    Dipartimento di Ingegneria dell' Informazione: Elettronica, Informatica e Telecomunicazioni, Universita di Pisa, via G. Caruso 16, I-56122, Pisa (PI), Italy;

    Dipartimento di Ingegneria dell' Informazione: Elettronica, Informatica e Telecomunicazioni, Universita di Pisa, via G. Caruso 16, I-56122, Pisa (PI), Italy;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);美国《化学文摘》(CA);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    voltage reference; subthreshold circuit; temperature compensation; CMOS analog design; variability-aware design;

    机译:参考电压亚阈值电路;温度补偿;CMOS模拟设计;可变性设计;

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