A low-power temperature-compensated CMOS peaking current reference in subthreshold region

摘要

In this paper, a new method to achieve very small current reference levels on integrated circuits with immunity to temperature variations using peaking current source with MOSFETs operating in subthreshold region is proposed. By adding a source degeneration resistor to the conventional peaking current source architecture, a zero temperature coefficient current can be generated. The proposed low-power circuit operating in the weak inversion region is designed, simulated, and fabricated in a 0.18-μm standard CMOS process. Measurement results verify the circuit operation with about 5% variation over the span of -40°C to +100°C (industrial temperature grade). The supplied current is designed to be 1.5 μA.