A Testability Measure for DC-Excited Periodically Switched Networks With Applications to DC-DC Converters

摘要

Testability analysis is a fundamental prerequisite to any fault location or parameter identification technique (FLPIT) for analog circuits. However, differently from the linear time-invariant field, this topic has been poorly investigated with regard to nonlinear circuits. In this paper, for the first time, to the best of our knowledge, the question is addressed with reference to periodically switched networks with dc stimuli (PSNDSs), a class of inherently nonlinear time-varying circuits that subsumes dc-dc converters as noteworthy members. A rigorous testability measure at both a circuit and a component level is thereby obtained, which provides information as to how many and which components can be unambiguously diagnosed or estimated from time-domain measurements. Consequently, it yields an upper bound, independent of the parameter values and the test instants, to the performance of whatever method actually employed as an FLPIT. This theoretical testability metric has been converted into an efficient computer program for the fully automated testability analysis of PSNDSs presented herein. Such a computer program represents the first practical testability gauge for PSNDSs: it can be employed by both test engineers and circuit designers as a guide to properly selecting injection and measurement points as well as estimating the number of necessary measurement instants, so as to shape their own FLPITs. Several examples are provided for which an in-depth pencil-and-paper testability analysis is contrasted with its automated counterpart provided by the aforementioned software: in particular, popular dc-dc converter topologies are thoroughly analyzed. Comparisons with a previously proposed frequency-domain testability measure are also considered.