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Real-Time Power System Phasors and Harmonics Estimation Using a New Decoupled Recursive-Least-Squares Technique for DSP Implementation

机译:使用一种新的去耦递归最小二乘技术进行DSP的实时电力系统相量和谐波估计

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This paper presents the mathematical basis to restructure the recursive-least-squares (RLS) technique for real-time implementations on digital signal processors (DSPs). The proposed decoupled RLS (DRLS) technique is adapted for real-time estimation of phasors and harmonics. The comparison between the proposed technique and the conventional RLS one shows considerable improvement in terms of reducing the turnaround time on two different off-the-shelf research and development DSP platforms. The DRLS technique also shows better computational efficiency than the adaptive linear combiner (ADALINE) and recursive discrete Fourier transform (RDFT) techniques in direct estimation of amplitude and phase angle when implemented on DSPs. The DRLS technique performance is also superior to that of the ADALINE and RDFT techniques under the presence of noise, subharmonics, and frequency variations. The performance of the proposed technique has been evaluated by simulations using MATLAB-Simulink and through real-time experiments. Selected results presented in this paper confirm the DSP turnaround time improvementand satisfactory performance of the proposed technique.
机译:本文提出了数学基础,以重构递归最小二乘(RLS)技术,以在数字信号处理器(DSP)上实时实现。所提出的解耦RLS(DRLS)技术适用于相量和谐波的实时估计。所提出的技术与常规RLS的比较表明,在减少两个不同的现成研究和开发DSP平台上的周转时间方面,有了可观的改进。当直接在幅度和相位角上估算DSP时,DRLS技术还显示出比自适应线性组合器(ADALINE)和递归离散傅里叶变换(RDFT)技术更好的计算效率。在存在噪声,次谐波和频率变化的情况下,DRLS技术的性能也优于ADALINE和RDFT技术。通过使用MATLAB-Simulink进行仿真并通过实时实验对所提出技术的性能进行了评估。本文提出的选定结果证实了DSP周转时间的改进和所提出技术的令人满意的性能。

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