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Ultrathin High-k Gate Dielectric Films on Strained-Si/SiGe Heterolayers

机译:应变Si / SiGe异质层上的超薄高k栅极介电膜

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We have investigated the deposition of alternative gate dielectrics i.e., high dielectric constant (high-k) materials such as ZrO_2 and TiO_2 on strained-Si on relaxed SiGe and strained-SiGe layers. The strained-Si heterolayers generally acquire a high defect density during heteroepitaxy and also the high-k gate dielectric films are prone to point defects. These defects play an important role in determining the electrical properties of the deposited films and their reliability. Basic understanding of the physical and chemical nature of these defects may help to alleviate the reliability problems. In this paper, the nature of several point defects and trap centers created from both strained-Si substrates and high-k gate dielectrics itself has been studied in detail. Magnetic resonance technique has been used to study the chemical nature of the defects present at the interface and dielectric trapping defects present in strained-Si/high-k metal-insulator-semiconductor (MIS) capacitors. The physical nature and the quantification of the trapping/detrapping centers have also been studied under stressing (in both constant current and voltage modes). Time-dependent dielectric breakdown (TDDB) characteristics have been measured to study the reliability of the MIS capacitors.
机译:我们已经研究了替代栅极电介质的沉积,即高介电常数(高k)材料(例如ZrO_2和TiO_2)在松弛SiGe和应变SiGe层上的应变Si上的沉积。应变硅异质层通常在异质外延过程中获得高缺陷密度,并且高k栅极电介质膜也容易出现点缺陷。这些缺陷在确定沉积膜的电性能及其可靠性方面起着重要作用。对这些缺陷的物理和化学性质的基本了解可以帮助减轻可靠性问题。在本文中,已经详细研究了由应变硅衬底和高k栅极电介质本身产生的几个点缺陷和陷阱中心的性质。磁共振技术已被用于研究界面处缺陷的化学性质以及应变硅/高k金属绝缘子半导体(MIS)电容器中存在的电介质俘获缺陷。还研究了在压力下(在恒定电流和电压模式下)捕获/捕获中心的物理性质和定量。测量了随时间变化的介电击穿(TDDB)特性,以研究MIS电容器的可靠性。

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