A Robust 3-D Structure for Superjunction VDMOS Under Undamped Inductive Switching Condition

摘要

A novel 3-D structure for Superjunction (SJ) VDMOS which results in high avalanche energy (E_(AS)) under undamped inductive switching condition without degrading the ON-state current capability is reported in this paper. The proposed structure fabricated in deep trench technology has segmented n+ source region and strip gate. The novel structure can suppress the hole current path beneath the n+ source region under avalanche breakdown condition because of the p+ region which is located between the segmented n+ source regions. In order to verify the mechanism, numerous 3-D simulations are performed using Sentaurus TCAD. As a result, the measurement shows that the robust deep trench SJ-VDMOS improved the E_(AS) by more than six times compared with the conventional structure.