Low-Power VLSI Architecture for a New Block-Matching Motion Estimation Algorithm Using Dual-Bit-Resolution Images

摘要

This paper describes an improved multiresolu- tion telescopic search algorithm (MRTlcSA) for block-matching motion estimation. The algorithm uses images with full and re- duced bit resolution, and uses motion-track and adaptive-search- window strategies. Simulation results show that the proposed algorithm has low computational complexity and achieves good image quality. We have developed a systolic-architecture-based search engine that has split data paths.