A Design of the Signal Processing Hardware Platform for Communication Systems

Byung Wook LEE; Sung Ho CHO

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A Design of the Signal Processing Hardware Platform for Communication Systems

机译：通信系统信号处理硬件平台的设计

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摘要

In this letter, an efficient hardware platform for the digital signal processing for OFDM communication systems is presented. The hardware platform consists of a single FPGA having 900 K gates, two DSPs with maximum 8,000 MIPS at 1 GHz clock, 2-channel AD

机译：在这封信中，提出了一种用于OFDM通信系统的数字信号处理的有效硬件平台。硬件平台包括一个具有900 K门的FPGA，两个DSP（在1 GHz时钟下最大8,000 MIPS），2通道AD

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来源
《IEICE Transactions on Communications》 |2008年第3期|p.939-942|共4页
作者
Byung Wook LEE; Sung Ho CHO;
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作者单位

Department of Electronics and Computer Engineering, Hanyang University, Seoul, Korea;

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原文格式 PDF
正文语种 eng
中图分类无线电电子学、电信技术;
关键词
OFDM; IEEE 802.16; FPGA; DSP; platform;

机译：OFDM;IEEE 802.16;FPGA;DSP;平台;

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A Design of the Signal Processing Hardware Platform for Communication Systems

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