The paper considers real time implementation of recurrent digital signal processing algorithms on an application-specific multiprocessor system. The objective is to devise a periodic, fully static task assignment for a DSP algorithm under the constraint of data sampling period by assuming interprocessor communication delay is negligible. Toward this goal, the authors propose a novel algorithm unfolding technique called the generalized perfect rate graph (GPRG). They prove that a recurrent algorithm will admit a fully static multiprocessor implementation for a given initiation interval if and only if the corresponding iterative computational dependence graph of this algorithm is a GPRG. Compared with previous results, GPRG often leads to a smaller unfolding factor /spl alpha//sub GPRG/.
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机译:本文考虑了在特定的多处理器系统上实时实现循环数字信号处理算法。目的是通过假设处理器间通信延迟可忽略不计,为DSP算法设计一个周期性的,完全静态的任务分配。为了达到这个目标,作者提出了一种新颖的算法展开技术,称为广义完美速率图(GPRG)。他们证明,当且仅当该算法的相应迭代计算依赖性图为GPRG时,循环算法才能在给定的启动间隔内采用完全静态的多处理器实现。与以前的结果相比,GPRG通常会导致较小的展开因子/ spl alpha // sub GPRG /。
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