A Quasi-Three-Level PWM Scheme to Combat Motor Overvoltage in SiC-Based Single-Phase Drives

摘要

The emergence of fast switching wide-bandgap (WBG) power devices offers clear potential to implement higher power density and more efficient motor drives. However, the high voltage slew rate (dv/dt) of switching transients brought significant challenges that can hamper the wide adoption of WBG devices in motor drive applications. Specifically, the aggravated motor overvoltage oscillation, due to reflected voltage phenomenon under high dv/dt, is one of the mast considerable challenges that degrade the motor lifetime. With filter networks acting as the mainstream mitigation method, the advantages of WBG-based motor drives are compromised due to additional size and power loss of the filters. This letter proposes a novel quasi-three-level pulsewidth modulation scheme as a software solution to eliminate motor overvoltage oscillations in cable-fed drives. The proposed scheme adopts a brief zero-voltage state, with a predetermined time, in the midway of each pole-to-pole voltage transition. This allows the voltage reflections along the cable to significantly discontinue after two propagation cycles, securing the motor operation at prescribed voltage levels. The proposed scheme is applicable to two-level voltage-source inverters (VSIs). In this letter, the scheme is presented on a single-phase two-level VSI motor drive, supported with theoretical and experimental proof of concept.