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A $V$ -Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18-$mu{hbox {m}}$ CMOS

机译:0.18- $ mu {hbox {m}} $ CMOS中的$ V $频段四分频直接注入锁定分频器

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摘要

In this paper, a novel circuit topology of aCMOS divide-by-4 direct injection-locked frequency divider is presented for millimeter-wave applications. To enhance the locking range for circuit operations with a division ratio of 4, a series peaking technique is introduced in the proposed divider structure such that improved input injection efficiency can be achieved. Using a standard 0.18-$mu{hbox {m}}$ CMOS process, a $V$ -band frequency divider is fabricated for demonstration. Operated at a supply voltage of 1.8 V, the divider core consumes a dc power of 12.6 mW. At an incident power of 0 dBm, the fabricated circuit exhibits an input locking range of 2.44 GHz in the vicinity of 60 GHz. The measured output power and locked phase noise at 1-MHz offset are $-{hbox{7 dBm}}$ and $-{hbox{133 dBc/Hz}}$, respectively.
机译:在本文中,提出了一种适用于毫米波应用的新颖的CMOS 4分频直接注入锁定分频器的电路拓扑。为了以4的分频比增加电路操作的锁定范围,在建议的分频器结构中引入了串联峰化技术,从而可以提高输入注入效率。使用标准的0.18-μmu{hbox {m}} $ CMOS工艺,制造了用于演示的$ V $频带分频器。分压器内核在1.8 V的电源电压下工作,消耗的直流功率为12.6 mW。在0 dBm的入射功率下,装配好的电路在60 GHz附近表现出2.44 GHz的输入锁定范围。在1 MHz偏移处测得的输出功率和锁定相位噪声分别为$-{hbox {7 dBm}} $和$-{hbox {133 dBc / Hz}} $。

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