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An Ultra-Low-Power Wideband Inductorless CMOS LNA With Tunable Active Shunt-Feedback

机译:具有可调有源并联反馈的超低功耗宽带无电感CMOS LNA

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摘要

This work presents and analyzes the design of a 1-V ultra-low power, compact, and wideband low-noise amplifier (LNA). The proposed LNA uses common-gate (CG) NMOS and PMOS transistors as input devices in a complementary current-reuse structure. Low power input matching is achieved by employing an active shunt-feedback architecture while the current of the feedback stage is also reused by the input transistor to improve the current efficiency of the LNA. A forward body biasing (FBB) scheme is exploited to tune the feedback coefficient. The complementary characteristics of the input stage leads to partial second-order distortion cancellation. The proposed inductorless LNA is implemented in an IBM 0.13- P8M CMOS technology and occupies only . The measured LNA has a 12.3-dB gain 4.9-dB minimum noise figure (NF) input referred third-order intercept point (IIP3) of −10 dBm and 0.1–-2.2 GHz bandwidth (BW), while consuming only 400 from a 1-V supply.
机译:这项工作介绍并分析了1V超低功耗,紧凑型宽带低噪声放大器(LNA)的设计。拟议的LNA在互补电流重用结构中使用共栅(CG)NMOS和PMOS晶体管作为输入设备。低功耗输入匹配通过采用有源并联反馈架构实现,而反馈级的电流也被输入晶体管重用,以提高LNA的电流效率。利用前向身体偏置(FBB)方案来调整反馈系数。输入级的互补特性导致部分二阶失真消除。提出的无电感器LNA以IBM 0.13-P8M CMOS技术实现,并且仅占用。测得的LNA具有12.3 dB的增益,4.9 dB的最低噪声系数(NF)输入参考的三阶截取点(IIP3)为-10 dBm和0.1–-2.2 GHz带宽(BW),而从1中仅消耗400 -V电源。

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