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Combinational ATPG theorems for identifying untestable faults in sequential circuits

机译:组合式ATPG定理,用于确定顺序电路中无法测试的故障

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We give two theorems for identifying untestable faults in sequential circuits. The first, the single-fault theorem, states that if a single fault in a combinational array is untestable then that fault is untestable in the sequential circuit. The array replicates the combinational logic and can have any finite length. We assume that the present state inputs of the left-most block are completely controllable. The next state outputs of the right-most block are considered observable. A combinational test pattern generator determines the detectability of single faults in the right-most block. The second theorem, called the multifault theorem, uses the array model with a multifault consisting of a single fault in every block. The theorem states that an untestable multifault in the array corresponds to an untestable single fault in the sequential circuit. For the array with a single block both theorems identify combinational redundancies. Experiments on ISCAS benchmarks show that using a small array size (typically, two to four blocks) we can identify a large number of sequentially untestable faults.
机译:我们给出了两个定理,用于识别时序电路中无法测试的故障。第一个是单故障定理,指出如果组合阵列中的单个故障无法测试,则该故障在时序电路中无法测试。该数组复制组合逻辑,并且可以具有任何有限的长度。我们假设最左边的块的当前状态输入是完全可控的。最右边的块的下一个状态输出被认为是可观察到的。组合测试模式生成器确定最右侧块中单个故障的可检测性。第二个定理称为多重故障定理,它使用具有多个故障的阵列模型,该故障由每个块中的单个故障组成。定理指出,阵列中不可测的多重故障对应于时序电路中不可测的单个故障。对于具有单个块的阵列,两个定理都确定了组合冗余。在ISCAS基准上进行的实验表明,使用较小的阵列大小(通常为2到4个块),我们可以识别出大量无法顺序测试的故障。

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