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首页> 外文期刊>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems >Relaxation-based transient sensitivity computations for MOSFET circuits
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Relaxation-based transient sensitivity computations for MOSFET circuits

机译:基于松弛的MOSFET电路瞬态灵敏度计算

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In this paper, we propose two new methods for computing the transient sensitivities of large scale MOSFET circuits, which exploit the relaxation-based circuit simulation techniques, the waveform relaxation (WR) method and the iterated timing analysis (ITA) method. Sufficient conditions are stated and proven, which are quite mild for MOSFET circuits, for convergence of these new methods. A pruning scheme, which prunes the sensitivity circuits, takes the positions of the design parameters as well as the outputs of interest into account and saves any redundant subcircuit computation even though that subcircuit may not be latent. By modifying the original WR and ITA algorithms, we also present practical computational algorithms which can process multiple design parameters. These practical algorithms retain most of the structures of the original algorithms, which can easily be implemented into available relaxation-based circuit simulators. These new methods have been implemented and the experimental results for several circuits are shown to demonstrate their effectiveness.
机译:在本文中,我们提出了两种用于计算大型MOSFET电路瞬态灵敏度的新方法,它们利用基于松弛的电路仿真技术,波形松弛(WR)方法和迭代时序分析(ITA)方法。陈述并证明了足够的条件,这些条件对于MOSFET电路来说是温和的,可以使这些新方法收敛。修剪敏感电路的修剪方案会考虑设计参数的位置以及感兴趣的输出,即使该子电路可能没有潜伏性,也可以节省任何多余的子电路计算。通过修改原始的WR和ITA算法,我们还提出了可以处理多个设计参数的实用计算算法。这些实用的算法保留了原始算法的大多数结构,可以轻松地将其实现为可用的基于松弛的电路模拟器。已经实施了这些新方法,并显示了几个电路的实验结果以证明其有效性。

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