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Pin assignment with global routing for VLSI building block layout

机译:带有全局布线的引脚分配,用于VLSI构建块布局

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摘要

In this paper, we will consider global routing and pin assignment in VLSI building block layout, and present an efficient algorithm which integrates global routing, pin assignment, block reshaping and positioning. The general flow of the proposed algorithm is the same as the one proposed in by Cong in 1991 [1] and consists of two main phases. The first phase is to determine not only global routes and coarse pin assignment in the same way as [1], but also shapes and positions of blocks. The second phase is to compute the final pin assignment for channels. We generalize the channel pin assignment (CPA) problem in [1], in which the CPA problem is formulated for only channels formed by two blocks, to the CPA problem for channels formed by multiple blocks. We will propose a linear time optimal channel pin assignment algorithm, which is an extension of the algorithm in [1]. Experimental results show the effectiveness of the proposed algorithm.
机译:在本文中,我们将在VLSI构建块布局中考虑全局布线和引脚分配,并提出一种有效的算法,该算法集成了全局布线,引脚分配,模块重塑和定位。该算法的总体流程与Cong在1991年提出的算法相同[1],它由两个主要阶段组成。第一阶段不仅要以[1]相同的方式确定全局路径和粗大的引脚分配,还要确定块的形状和位置。第二阶段是计算通道的最终引脚分配。我们在[1]中将通道引脚分配(CPA)问题推广到其中,仅针对由两个模块形成的通道制定了CPA问题,对针对由多个模块形成的通道制定了CPA问题。我们将提出一种线性时间最优通道引脚分配算法,该算法是[1]中算法的扩展。实验结果表明了该算法的有效性。

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