Robust and Efficient Transistor-Level Envelope-Following Analysis of PWM/PFM/PSM DC-DC Converters

摘要

The envelope-following (EF) simulation of practical dc-dc converters is challenging due to the presence of digital behavior, strong nonlinearity, complex frequency module schemes, and feedback loops. This paper presents a novel EF method for time-domain analysis of dc-dc converters-based upon a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. We further develop an EF technique that is applicable to both fixed and varying switching frequency operations, thereby providing a unifying solution to converters with pulse width modulation, pulse frequency modulation, and pulse skipping modulation. By adopting three fast simulation techniques, our proposed EF method achieves higher speedup without composing the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several dc-dc converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several dc-dc converters with strong nonlinear switching characteristics.