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Impact of distributed gate resistance on the performance of MOS devices

机译:分布式栅极电阻对MOS器件性能的影响

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This paper describes the impact of gate resistance on cut-off frequency (f/sub T/), maximum frequency of oscillation (f/sub max/), thermal noise, and time response of wide MOS devices with deep submicron channel lengths. The value of f/sub T/ is proven to be independent of gate resistance even for distributed structures. An exact relation for f/sub max/ is derived and it is shown that, to predict f/sub max/, thermal noise, and time response, the distributed gate resistance can be divided by a factor of 3 and lumped into a single resistor in series with the gate terminal.
机译:本文描述了栅极电阻对具有深亚微米沟道长度的宽MOS器件的截止频率(f / sub T /),最大振荡频率(f / sub max /),热噪声和时间响应的影响。即使对于分布式结构,f / sub T /的值也被证明与栅极电阻无关。推导了f / sub max /的精确关系,结果表明,要预测f / sub max /,热噪声和时间响应,可将分布式栅极电阻除以3并除以一个电阻与栅极端子串联。

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