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Cascade switched-capacitor IIR decimating filters

机译:级联开关电容器IIR抽取滤波器

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Comprehensive methodologies are described for the design of infinite impulse response switched-capacitor (SC) decimating filters employing either externally cascaded or internally cascaded structures. The former are more appropriate to achieve high decimating factors but suffer from the effects of unwanted aliasing frequency components associated with the intermediate sampling frequencies. The latter overcome this problem but become more complex to design to attain high decimating factors. Such decimating filters allow not only to relax the requirements of continuous-time pre-filters in the context of traditional SC filter systems but also to realize arbitrary baseband and anti-aliasing amplitude responses employing operational amplifiers with more relaxed speed requirements than their traditional SC filters counterparts. Examples are given to illustrate the proposed methodologies
机译:描述了用于设计采用外部级联或内部级联结构的无限冲激响应开关电容器(SC)抽取滤波器的综合方法。前者更适合于实现高抽取因子,但会遭受与中间采样频率相关的不必要的混叠频率分量的影响。后者克服了这个问题,但是为了获得高抽取因子,设计变得更加复杂。这样的抽取滤波器不仅可以放宽传统SC滤波器系统中对连续时间前置滤波器的要求,而且还可以实现运算放大器的任意基带和抗混叠幅度响应,而运算放大器的速度要求比传统SC滤波器更为宽松同行。举例说明了所提出的方法

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