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System Embedded ADC Calibration for OFDM Receivers

机译:OFDM接收机的系统嵌入式ADC校准

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This paper describes a background calibration technique for analog-to-digital converters (ADCs) that exploits communication protocol redundancy to measure and correct for analog circuit imperfections. In particular, we consider the implementation of a 6-bit, 500-MS/s ADC in the receiver of an ultra wideband system using orthogonal frequency division multiplexing (OFDM). The calibration is intended for a time-interleaved array of successive approximation register ADCs and cancels converter non-linearity due to inter-channel offset mismatches. The individual channel offsets are estimated through statistical correlation, based on known pseudorandom modulation sequences used in OFDM pilot tones. Our simulation results show that the proposed calibration is capable of improving the signal-to-noise and distortion ratio from 20 to 37 dB with a tracking time constant of 85 ms, assuming an additive white Gaussian noise channel with 20-dB signal-to-noise ratio.
机译:本文介绍了一种用于模数转换器(ADC)的背景校准技术,该技术利用通信协议冗余来测量和校正模拟电路缺陷。特别是,我们考虑使用正交频分复用(OFDM)在超宽带系统的接收机中实现6位500-MS / s ADC。该校准旨在用于连续逼近寄存器ADC的时间交错阵列,并消除由于通道间失调引起的转换器非线性。基于在OFDM导频音中使用的已知伪随机调制序列,通过统计相关性来估计各个信道偏移。我们的仿真结果表明,假设具有20dB信噪比的加性高斯白噪声通道,建议的校准能够以85 ms的跟踪时间常数将信噪比和失真比从20 dB提高到37 dB。噪声比。

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