A False-Lock-Free Clock/Data Recovery PLL for NRZ Data Using Adaptive Phase Frequency Detector

摘要

An adaptive four-state phase-frequency detector (PFD) for clock and data recovery (CDR) phased-lock loop (PLL) of nonreturn to zero (NRZ) data is presented. The PLL achieves false-lock free operation with rapid frequency capture and wide capture range. The false-lock-free nature of the PLL is achieved by adaptively adjusting data delay in the proposed PFD. Circuitry and corresponding operation of blocks in the PFD and overall PLL architecture that enables rapid frequency capture and prevents false lock are described in detail.