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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >Computing Timing Jitter From Phase Noise Spectra for Oscillators and Phase-Locked Loops With White and$1/f$Noise
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Computing Timing Jitter From Phase Noise Spectra for Oscillators and Phase-Locked Loops With White and$1/f$Noise

机译:从相位噪声频谱计算具有白色和$ 1 / f $噪声的振荡器和锁相环的时序抖动

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Phase noise and timing jitter in oscillators and phase-locked loops (PLLs) are of major concern in wireless and optical communications. In this paper, a unified analysis of the relationships between time-domain jitter and various spectral characterizations of phase noise is first presented. Several notions of phase noise spectra are considered, in particular, the power-spectral density (PSD) of the excess phase noise, the PSD of the signal generated by a noisy oscillator/PLL, and the so-called single-sideband (SSB) phase noise spectrum. We investigate the origins of these phase noise spectra and discuss their mathematical soundness. A simple equation relating the variance of timing jitter to the phase noise spectrum is derived and its mathematical validity is analyzed. Then, practical results on computing jitter from spectral phase noise characteristics for oscillators and PLLs with both white (thermal, shot) and 1/f noise are presented. We are able to obtain analytical timing jitter results for free-running oscillators and first-order PLLs. A numerical procedure is used for higher order PLLs. The phase noise spectrum needed for computing jitter may be obtained from analytical phase noise models, oscillator or PLL noise analysis in a circuit simulator, or from actual measurements
机译:振荡器和锁相环(PLL)中的相位噪声和定时抖动是无线和光通信中的主要问题。本文首先对时域抖动与相位噪声的各种频谱特性之间的关系进行了统一分析。考虑了相位噪声频谱的几种概念,特别是过量相位噪声的功率谱密度(PSD),由噪声振荡器/ PLL产生的信号的PSD和所谓的单边带(SSB)相位噪声频谱。我们研究了这些相位噪声频谱的起源,并讨论了它们的数学稳健性。推导了一个简单的方程,将定时抖动的方差与相位噪声频谱相关联,并分析了其数学有效性。然后,给出了从具有白噪声(热噪声,散粒噪声)和1 / f噪声的振荡器和PLL的频谱相位噪声特性计算抖动的实际结果。我们能够获得自由运行的振荡器和一阶PLL的分析时序抖动结果。数值过程用于高阶PLL。计算抖动所需的相位噪声频谱可以从分析性相位噪声模型,电路模拟器中的振荡器或PLL噪声分析中获得,也可以从实际测量中获得

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