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A novel CMOS low-noise amplifier design for 3.1- to 10.6-GHz ultra-wide-band wireless receivers

机译:适用于3.1至10.6 GHz超宽带无线接收器的新颖CMOS低噪声放大器设计

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摘要

An ultra-wideband (UWB) 3.1- to 10.6-GHz low-noise amplifier (LNA) employing a common-gate stage for wideband input matching is presented in this paper. Designed in a commercial 0.18-μm 1.8-V standard RFCMOS technology, the proposed UWB LNA achieves fully on-chip circuit implementation, contributing to the realization of a single-chip CMOS UWB receiver. The proposed UWB LNA achieves 16.7±0.8 dB power gain with a good input match (S11<-9 dB) over the 7500-MHz bandwidth (from 3.1 GHz to 10.6 GHz), and an average noise figure of 4.0 dB, while drawing 18.4-mA dc biasing current from the 1.8-V power supply. A gain control mechanism is also introduced for the first time in the proposed design by varying the biasing current of the gain stage without influencing the other figures of merit of the circuit so as to accommodate the UWB LNA in various UWB wireless transmission systems with different link budgets.
机译:本文介绍了采用共栅级进行宽带输入匹配的超宽带(UWB)3.1至10.6 GHz低噪声放大器(LNA)。拟议的UWB LNA采用商业0.18μm1.8V标准RFCMOS技术进行设计,可实现完整的片上电路实现,有助于实现单芯片CMOS UWB接收器。拟议的UWB LNA在7500-MHz带宽(从3.1 GHz到10.6 GHz)上具有良好的输入匹配(S11 <-9 dB)时,可实现16.7±0.8 dB的功率增益,而平均噪声系数为4.0 dB,同时得出18.4来自1.8V电源的-mA dc偏置电流。在所提出的设计中,还首次引入了一种增益控制机制,该机制通过改变增益级的偏置电流而不影响电路的其他优点,从而将UWB LNA容纳在具有不同链路的各种UWB无线传输系统中预算。

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