首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >Analytical Synthesis of Low-Sensitivity High-Order Voltage-Mode DDCC and FDCCII-Grounded R and C All-Pass Filter Structures
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Analytical Synthesis of Low-Sensitivity High-Order Voltage-Mode DDCC and FDCCII-Grounded R and C All-Pass Filter Structures

机译:低灵敏度高阶电压模式DDCC和FDCCII接地的R和C全通滤波器结构的分析综合

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The difficulty of realizing the operations of addition and subtraction of a voltage-mode signal renders two special active elements, namely, differential difference current conveyors (DDCCs) and fully differential current conveyors (FDCCIIs), both of which have the ability to perform the operations of addition and subtraction, to become very important for voltage-mode analog filter design. Note that, for the design of operational transconductance amplifier and capacitor (OTA-C) filters, the recently reported analytical synthesis methods (ASMs) have been shown to be very effective for achieving simultaneously the three criteria, namely, all capacitors being grounded, the use of the minimum number of active and passive components, and the use of single-ended input OTAs. However, none of the ASMs uses DDCCs and FDCCIIs in the design of voltage-mode filters. In this paper, a method of realizing DDCC and FDCCII-based all-pass filter structures with either equal capacitances or equal conductances through a new ASM is presented. Only n current conveyors (the least number of active components), n grounded capacitors, and grounded resistors (the minimum number of passive components) are used for realizing an nth-order voltage-mode all-pass filter structure. Moreover, the new all-pass filter structure synthesized by the new ASM achieves very low individual as well as near-null group sensitivities just as in the case of the passive LC ladder filters, has very low power consumption, a low component spread for equal denominator conductance design, and a high input impedance which is attractive from the point of view of cascadability. Finally, H-Spice simulations, using 0.35-mum process and plusmn1.65-V supply voltages, are included and validate theoretical predictions.
机译:实现电压模式信号的加法和减法操作很困难,这带来了两个特殊的有源元件,即差分差动电流传输器(DDCC)和全差分差动电流传输器(FDCCII),它们都具有执行操作的能力加法和减法,对于电压模式模拟滤波器设计变得非常重要。请注意,对于运算跨导放大器和电容器(OTA-C)滤波器的设计,最近报告的分析综合方法(ASM)已被证明对于同时实现三个标准(即所有电容器都接地,使用最少数量的有源和无源组件,以及使用单端输入OTA。但是,在电压模式滤波器的设计中,没有一个ASM使用DDCC和FDCCII。本文提出了一种通过新的ASM实现具有相等电容或相等电导的基于DDCC和FDCCII的全通滤波器结构的方法。实现n阶电压模式全通滤波器结构时,仅使用n个电流传输器(最少的有源组件),n个接地的电容器和接地的电阻(最少的无源组件)。而且,由新的ASM合成的新的全通滤波器结构实现了非常低的个体灵敏度和接近零组灵敏度,就像无源LC梯形滤波器一样,具有非常低的功耗,相等的低色散分母电导设计和高输入阻抗,从级联的角度来看很有吸引力。最后,还包括使用0.35微米工艺和加1.65 V电源电压的H-Spice仿真,并验证了理论预测。

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