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Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter

机译:增益增强型N路径开关电容器带通滤波器的分析和建模

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It has been studied that, an N-path switched-capacitor (SC) branch driven by an N-phase non-overlapped local oscillator (LO), is equivalent to a tunable parallel-RLC tank suitable for radio-frequency (RF) filtering. This paper proposes a gain-boosted N-path SC bandpass filter (GB-BPF) with a number of sought features. It is based on a transconductance amplifier $({rm G}_{rm m})$ with an N-path SC branch as its feedback network, offering: 1) double RF filtering at the input and output of the ${rm G}_{rm m}$ in one step; 2) customized passband gain and bandwidth with input-impedance match; and 3) reduced physical capacitance thanks to the loop gain offered by ${rm G}_{rm m}$. All have been examined using a RLC model of the SC branch before applying the linear periodically time-variant (LPTV) analysis to derive the R, L, and C expressions and analytically study the harmonic selectivity, harmonic folding, and noise. The latter reveals that: 1) the noise due to the switches is notched at the output, allowing smaller switches to save the LO power and 2) the noises due to the source resistance and ${rm G}_{rm m}$ are narrowband at the output, reducing the folded noise during harmonic mixing. To study the influence of circuit non-idealities, an intuitive equivalent circuit model is also proposed and verified. The design example is a four-path 0.5–2-GHz GB-BPF simulated with the 65-nm CMOS. It exhibits $>$11 dB gain, $<$2.3 dB NF, and $+$21-dBm out-of-band IIP3 at 150-MHz offset, while consuming just- 7 mW of power.
机译:研究表明,由N相非重叠本机振荡器(LO)驱动的N路径开关电容器(SC)分支等效于适用于射频(RF)滤波的可调谐并行RLC储罐。本文提出了具有许多寻求特征的增益增强型N路径SC带通滤波器(GB-BPF)。它基于具有N路径SC的跨导放大器 $({rm G} _ {rm m})$ 分支作为其反馈网络,提供:1)在 $ {rm G} _ {rm m} $ 一步; 2)具有输入阻抗匹配的定制通带增益和带宽;和3)由于 $ {rm G} _ {rm m} $ 提供的环路增益而降低了物理电容。在应用线性周期性时变(LPTV)分析以得出R,L和C表达式并分析研究谐波选择性,谐波折叠和噪声之前,已使用SC分支的RLC模型对所有参数进行了检查。后者表明:1)由于开关引起的噪声在输出端被陷波,从而允许较小的开关节省LO功率; 2)由于源电阻和 $ {rm G} _ {rm m} $ 在输出处为窄带,从而降低了谐波混频期间的折叠噪声。为了研究电路非理想性的影响,还提出并验证了直观的等效电路模型。设计示例是使用65 nm CMOS模拟的四路径0.5–2 GHz GB-BPF。它具有 $> $ 11 dB增益, $ <$ 2.3 dB NF和 $ + $ 21 dBm带外IIP3的偏移为150MHz,而功耗仅为7mW。

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