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Loss Mechanisms and Optimum Design Methodology for Efficient mm-Waves Class-E PAs

机译:高效毫米波E类功率放大器的损耗机理和最佳设计方法

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In this paper, loss mechanisms of monolithic high frequency Class-E PAs are studied. The switching behavior is analyzed to understand the discrepancy between common design equations and optimal design values as frequency scales up. Analytical results are verified by spice simulations. In addition, a design recipe based on loss analysis and effective output duty cycle is proposed for mm-waves PAs to boost their power added efficiency (PAE). The design approach is adopted to compare different technology nodes including the 130 nm, 90 nm, and 65 nm bulk CMOS. Newer technologies show better PAE only at the mm-waves regime. Simulations show that the PAE is boosted from 31% to 40% when the proposed design methodology is applied at 60 GHz using the 65 nm node.
机译:本文研究了单片高频E类功率放大器的损耗机理。分析开关行为,以了解常见设计方程与最佳设计值之间随频率增大而产生的差异。分析结果通过香料模拟得到验证。此外,针对毫米波功率放大器提出了一种基于损耗分析和有效输出占空比的设计方案,以提高其功率附加效率(PAE)。采用该设计方法来比较不同的技术节点,包括130 nm,90 nm和65 nm体CMOS。较新的技术仅在毫米波范围内显示出更好的PAE。仿真表明,当使用65 nm节点在60 GHz上应用建议的设计方法时,PAE从31%提高到40%。

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