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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients
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LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

机译:具有改进的公共栅极类AB OTA的LDO处理任何负载电容并提供快速响应负载瞬变

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This article proposes an LDO with fast response to load transients that can handle any practical capacitive loads. These features are mainly due to a novel frequency compensation circuit tailored for its error amplifier, which is based on an improved version of the popular common gate amplifier. A simple yet effective approach to the small-signal analysis of LDO with multiple feedback loops is employed to analyse intuitively the LDO and derive key design constraints. Simulation and measurement results performed on a test chip implemented in standard 130nm CMOS process validated the proposed LDO. It requires only $0.7mu ext{A}$ quiescent current but exhibits an excellent response to load transients: when the load current jumps from 0A to 100mA in $1mu ext{s}$ the output voltage presents an undershoot of 76mV and an overshoot of 198mV, without decoupling capacitors. It compares well against seven LDOs designed with common gate error amplifiers for similar levels of supply voltage, output voltage and current and against seven fast LDOs employing different error amplifiers. A figure-of-merit that considers the quiescent current, the maximum load current and capacitance, as well as the output voltage deviation, yielded a value for our LDO 39.8 times better than for the nearer competitor that employs common gate amplifier and 6 times better than the one employing a different error amplifier. When considering edge time and process scaling the performance of the proposed LDO is 4.8, respectively 4.5, times better than the second best in both comparisons.
机译:本文提出了一种快速响应负载瞬态的LDO,可以处理任何实用的电容负载。这些特征主要是由于其误差放大器量身定制的新颖频率补偿电路,这是基于流行公共栅极放大器的改进版本。使用具有多个反馈环路的LDO的小信号分析的简单但有效的方法,用于直观地分析LDO和推导键设计约束。在标准130NM CMOS过程中实现的测试芯片执行的仿真和测量结果验证了所提出的LDO。它只需要<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ 0.7 mu text {a} $ 静态电流,但展示了对负载瞬变的极好响应:当负载电流从0A跳至100mA时<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ 1 mu text {s} $ 输出电压呈现出76mV的下冲和198mV的过冲,而不会去耦电容器。它与具有公共栅极误差放大器的七个LDS相比,用于相似水平的电源电压,输出电压和电流以及采用不同误差放大器的七个快速LDO。考虑静止电流,最大负载电流和电容以及输出电压偏差的数字优于我们的LDO 39.8倍,而不是采用公共栅极放大器的近竞争对手和更好的6倍比采用不同的误差放大器的那个。考虑边缘时间和过程缩放所提出的LDO的性能分别为4.8,分别比对比较的第二个效率更好。

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